1. Technical Field
The present invention relates to digital electronic circuits and, more specifically, to programmable counters.
2. Description of the Related Art
Counters are used in a variety of digital circuits to track events. In addition, counters are used to synthesize clock signals and other waveforms. Generally, a second (lower) clock frequency is synthesized from a first (higher) clock frequency using a counter. Typically, a simple M/N:D type counter is used, where M and N are integers and D is the duty cycle of the output clock.
The M/N:D counter is typically implemented as a rising edge counter that counts pulses from the first clock frequency and periodically outputs a pulse at the second clock frequency. That is, the M/N counter outputs M pulses for every N pulses of a reference or input clock. The conventional M/N:D counter is synchronized to the reference clock such that the rising edge of each of the M output pulses is derived from the rising edge of the reference clock.
This is relatively straightforward when the first clock frequency is an integer multiple of the second clock frequency. However, when the first clock is not an integer multiple of the second clock, the task of clock synthesis becomes a bit more challenging. For example, if the reference clock is a 5 megahertz (MHz) clock, and it is necessary to synthesize a 1.5 MHz clock, in accordance with conventional teachings, the M/N counter, programmed to M=3 and N=10, effectively multiplies the reference clock by a 3/10 or outputs three clock pulses for every ten clock pulses of the reference clock.
In this conventional circuit, the resolution of a counter is one full clock period. This error of 200 nanoseconds or one clock period in the example of the 5 MHz reference clock is known to those skilled in the art as jitter. Clock signals synthesized with conventional M/N:D counters suffer from excessive clock jitter because the conventional M/N:D counter generates an output clock edge from the same point (i.e., the rollover point), in the counter sequence. The rollover point is the point at which the counter terminates a preceding count and begins a new count. As a result, output clock jitter will vary from zero to the period of the input reference clock despite the fact the ideal output clock edge will always exist somewhere between the last clock edge of the counter period and the rollover clock edge.
Such jitter is unacceptable for certain high precision applications. One such application is the Universal Serial Bus (USB) application. In this application, jitter is unacceptable as it interferes with a clock recovery operation. Another illustrative application is the analog to digital conversion application. In this application, jitter is unacceptable because it results in unpredictable data conversion rates and excessive noise. For these and other applications, it is important that the M/N:D counter operate at high frequencies. However, as is well known in the art, an M/N:D counter's input clock frequency range directly correlates to the amount of jitter in the output clock.
Thus, there is a need in the art for an improved M/N counter with improved jitter performance. The present invention provides this and other advantages as will be apparent from the following detailed description and accompanying figures.